Seminar by Mainak Chaudhuri
The Impact of Negative Acknowledgments in Shared Memory Scientific Applications
Mainak Chaudhuri
Computer Systems Laboratory
Cornell University
Ithaca, New York, USA
Date: Wednesday, October 8, 2003
Time: 2:30 PM
Venue: CS-101
Abstract
Negative ACKnowledgments (NACKs) and subsequent retries, used to resolve races and to enforce a total order among shared memory accesses in distributed shared memory (DSM) multiprocessors, not only introduce extra network traffic and contention, but also increase node controller occupancy, especially at the home. In this seminar, we present possible protocol optimizations to minimize these retries and offer a thorough study of the performance effects of these messages on six scalable scientific applications running on 64-node systems and larger. To eliminate NACKs we present a mechanism to queue pending requests at the main memory of the home node and augment it with a novel technique of combining pending read requests, thereby accelerating the parallel execution for 64 nodes by as much as 41% (a speedup of 1.41) compared to a modified version of the SGI Origin 2000 protocol. We further design and evaluate a protocol by combining this mechanism with a technique that we call write string forwarding, used in the AlphaServer GS320 and Piranha systems. We find that without careful design considerations, especially regarding atomic read-modify-write operations, this aggressive write forwarding can hurt performance. We identify and evaluate the necessary micro-architectural support to solve this problem. We compare the performance of these novel NACK-free protocols with a base bitvector protocol, a modified version of the SGI Origin 2000 protocol, and a NACK-free protocol that uses dirty sharing and write string forwarding as in the Piranha system. To understand the effects of network speed and topology the evaluation is carried out on three network configurations.
About the speaker
Mainak Chaudhuri is a PhD candidate in Computer Architecture in the School of Electrical and Computer Engineering at Cornell University. He holds a Bachelor of Technology in Electronics and Electrical Communication Engineering from the Indian Institute of Technology, Kharagpur (1999) and a Master of Science in Electrical and Computer Engineering from Cornell University (2001). His research interests include micro-architecture, parallel computer architecture, cache coherence protocol design and cache-conscious parallel algorithms for scientific computation.