Research interests
Every Cycle Counts
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Exploring Memory systems for future mobile/desktop/client/server system performance:
(i) Speculation techniques: value prediction, data/code prefetching, TLBs, Page-table-walkers, Cache hierarchies, Cache Compression
(ii) DRAM controllers, DRAM and storage for persistency
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It is none of your business (Secure Micro-architecture: defensive side)
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Designing secure processor and meomry hierarchy, miro-architecture for trusted Execution Environments (Intel SGX, ARM Trustzone), side/covert-channel mitigation techniques, security-performance tradeoffs, ORAM |
I know what you did last summer (Secure Micro-architecture: offensive side)
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Designing better and robust micro-architectural attacks, reverse-enginnering micro-architecture units of the commercial machines, finding flaws in the state-of-the-art mitigation techniques |