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Master of Science by Research Program (*gone on to do PhD)
*1. Divya Bagla, 2021-2024 (PhD, University of Virgina)
     Thesis: Exploiting Page Table Entry Compression to Improve Translation Look-aside Buffer Hit Rate
Master of Technology Program (*gone on to do PhD)
63. Mahi Agrawal, 2021-2023
     Thesis: Using Data Compression to Optimize Write Energy in STT-RAM-based Non-volatile Last-level Caches
62. P J Leo Evenss, 2021-2022
     Project: An Optimized Last-level TLB Replacement Policy for Graph Processing Workloads
61. Tamal Deep Maity, 2021-2022
     Thesis: Machine-learned Models for Data Prefetching in Microprocessors
60. Aditya Jain, 2021-2022
     Thesis: A Near-memory Graph Processing Accelerator
59. Swapnil Raykar, 2019-2020
     Thesis: Using Intel Resource Director Technology in Linux Process Scheduling
58. Jatin Dev, 2019-2020
     Thesis: Identifying and Prefetching Performance-critical Loads
57. Varun Jindal, 2019-2020
     Thesis: An Improved GPU-friendly Skip-list
*56. Abhishek Rose (co-supervised), 2016-2017 (PhD, IIT Delhi)
     Thesis: On Scheduling of Fully Virtualized GPUs in Integrated Graphics Hardware
55. Swapnil Mhamane (co-supervised), 2016-2017
     Thesis: Exploring Page Swapping Mechanism for Integrated GPUs in CPU-GPU Heterogeneous Processors
54. S Shivmaran, 2014-2017
     Thesis: Space-efficient Metadata Caching for Gigabyte DRAM Caches
53. Sawan Kumar Rauniyar (co-supervised), 2015-2017
     Thesis: A Scalable Node Proximity Tool for Distributed Clusters
52. Tarun Kumar Bhargava, 2015-2017
     Thesis: Accelerating Migratory Compression with GPUs
*51. Rahul Bera, 2015-2016 (PhD, ETH Zurich)
     Thesis: Adaptive Prefetch Filter to Mitigate Prefetcher-induced Pollution
50. Hardik Dodiya (co-supervised), 2015-2016
     Thesis: Policy-Rich Scheduling Framework for Container Orchestration
49. Abhimanyu Arora (co-supervised), 2015-2016
     Thesis: Design and Implementation of Live Virtual Machine Migration in a Cloud Computing System
48. Shivanshu Agrawal (co-supervised), 2015-2016
     Thesis: Distributed CPU and Memory Management in Cloud Computing Environments
47. Ch P K S Sampath Kumar, 2014-2015
     Thesis: Online Estimation of Reuse Distance and Its Application to Last-level Cache Management
*46. Subarno Banerjee, 2014-2015 (PhD, University of Michigan-Ann Arbor)
     Thesis: Mining Signatures of Inter-core Sharing Behavior in the Last-level Caches of Multi-core Processors
45. Atul Ramanath Pai (co-supervised), 2014-2015
     Thesis: GPU-accelerated Concurrency Testing
44. Aman Vats, 2013-2015
     Thesis: A Linearizable Concurrent Solution to the Online Top-k Frequent Item Mining Problem
43. Manish Kumar, 2013-2014
     Thesis: Executing OLAP Queries on GPU
42. George Kuruvilla, 2013-2014
     Thesis: Die-stacked DRAM Caches Augmented with Tag Caches for Multi-core Architectures
*41. Neeraj Kulkarni, 2013-2014 (PhD, Cornell University)
     Thesis: Accelerating Critical Sections in Multi-threaded Applications by Message Prioritization in On-chip Networks
40. Pankaj Aher, 2013-2014
     Thesis: Harnessing GPU Computing Power from Haskell: Database Implementation
39. Abhinash Jain (co-supervised), 2013-2014
     Thesis: Hardware-assisted Dynamic Elimination of Redundant Computation: A Preliminary Study
38. Prakhar Banga (co-supervised), 2013-2014
     Thesis: SINECOSEQ: A GPU-aided Analysis Tool for Concurrent Programs
37. Sumit Kumar (co-supervised), 2013-2014
     Thesis: Large-scale Fast Fourier Transforms on Clusters of Graphics Processing Units
36. Priyanka Laddha (co-supervised), 2013-2014
     Thesis: Speculative Loop Parallelization on Graphics Processors
35. Vijay Jain, 2013-2014
     Thesis: Reducing Conflicts in the First-level Data Caches with Selective Reservation for Hot Blocks
34. Dhaval R Joshi, 2013-2014
     Thesis: An Empirical Study of Parallel Max-flow Computation on CPU-GPU Heterogeneous Platforms
33. Snehal S Motarwar, 2013-2014
     Thesis: Accelerating GPU Atomics with Selective Local Caching of Atomic Data
32. Kavish Aggarwal, 2013-2014
     Thesis: Parallel Simulation of Cache Hierarchy on CPU-GPU Heterogeneous Platforms
31. Nitesh Bagmar, 2012-2013
     Thesis: Phase-driven and Profile-guided Power Management on Intel Single-chip Cloud Computer
30. Hemant Patre, 2012-2013
     Thesis: Atomic-Free Multi-GPU Computation of Minimum Spanning Tree and All-pair Shortest Path
29. Parveen Kumar, 2012-2013
     Thesis: Using Graphics Processors for Instruction Set Simulation: A Preliminary Feasibility Study
28. Kunjan Aggarwal, 2011-2013
     Thesis: K-means Clustering Algorithm: Efficient Implementation on Graphics Processing Units
27. Ajith Sankar J, 2011-2012
     Thesis: Parallel Unsymmetrical-pattern Multifrontal Sparse LU Decomposition on Heterogeneous Platforms
26. Prabhakar Misra, 2011-2012
     Thesis: Performance Evaluation of Concurrent Lock-free Data Structures on Graphics Processing Units
25. Arpan Maheshwari, 2011-2012
     Thesis: Parallel Clustering Algorithms for Graphics Processing Units
24. Hardik Patel, 2011-2012
     Thesis: Understanding the Challenges in Parallelization of Selected SPEC CINT2006 Applications
23. Rachit Agrawal, 2009-2010
     Thesis: Caching Alternatives for Discrete and Integrated Graphics
22. Rahul Patil, 2009-2010
     Thesis: Memory Controller Scheduling Policies for Discrete and Integrated Graphics
*21. Priyank Faldu, 2009-2010 (PhD, University of Edinburgh)
     Thesis: CUDA-LF : A Lock-Free Data Structure Library for GPGPU
20. Ashish Bhatia, 2009-2010
     Thesis: Slack-aware Adaptive Prefetching
*19. Abhayendra Narayan Singh, 2008-2009 (PhD, University of Michigan-Ann Arbor)
     Thesis: Energy-aware Point-to-point Synchronization
*18. Saurabh Gupta, 2008-2009 (PhD, North Carolina State University)
     Thesis: Preliminary Studies in Row Buffer Locality Enhancement via Dynamic Address Remapping
17. Santhosh Sharma (co-supervised), 2008-2009
     Thesis: Improving Speculative Loop Parallelization via Selective Squash and Speculation Reuse
*16. Pramod Bhatotia (co-supervised), 2007-2008 (PhD, Max Plank Institute for Software Systems)
     Thesis: Compiling Irregular Accesses for the Cell Broadband Engine
15. Ciju Cherian, 2005-2008
     Thesis: Selected Improvements to Checkpointed Early Load Retirement
14. Mayur V Shardul, 2007-2008
     Thesis: Energy-aware Selfish Load Balancing for Multi-core Servers
13. Victor Das, 2007-2008
     Thesis: An Auction-based Cache Replacement Policy for Chip Multiprocessors with L1 Cache-to-Cache Transfers
12. Vishwas B C, 2007-2008
     Thesis: Parallel Implementation of Cholesky, LU, and QR Factorization of Dense Matrices on the Cell Broadband Engine
11. Abhishek Gadia, 2007-2008
     Thesis: Parallel Implementation of Sparse Cholesky Factorization and Singular Value Decomposition on the Cell Broadband Engine
10. Prashant Kumar (co-supervised), 2006-2007
     Thesis: Software Transaction Memory Framework for Multi-Threading in Java
9. G Harinatarajan, 2006-2007
     Thesis: Prefetching with SMTp: Preliminary Results and Insights
8. Jugash Chandarlapati, 2006-2007
     Thesis: Power Modeling And Optimization in Chip-Multiprocessors
*7. Arkaprava Basu, 2006-2007 (PhD, University of Wisconsin-Madison)
     Thesis: A New Last-level Cache Architecture with Global Block Priority
6. Dhiraj D. Kalamkar, 2005-2006
     Thesis: Complexity-effective Cache-coherent Active Memory Clusters
5. Varun Khaneja, 2005-2006
     Thesis: Evaluation of a Directory-less Protocol on Distributed Shared Memory Multiprocessors with Unordered Interconnects
4. Srinivas Koripella, 2005-2006
     Thesis: Impact of Out of Order Load Issue and Load Value Prediction in Distributed Shared Memory Multiprocessors
3. Lakshmana Rao Vittanala, 2005-2006
     Thesis: Integrating Memory Compression Algorithms with Cache Coherence Protocols in Scalable Multiprocessors
*2. Mounendra S De Sarkar, 2005-2006 (PhD, IIT Kharagpur)
     Thesis: On Application of Multi-parameter Auctions to Page Allocation in Distributed Shared Memory Multiprocessors
1. Muppana G. Vijaya Bhaskar, 2005-2006
     Thesis: Dynamic Prediction and Early Recycling of Dead Registers
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