Course Objective
Memory subsystem is an important layer in the computing system that has to be efficient
for the whole system to operate efficiently. In the current era of computation, multiple cores
are deployed in devices that range from smart-phones, laptops, desktops, servers, and cloud
based systems. Though, innovations in the world of hardware and computer architecture have
resulted in faster computation in terms of better performance, a lot of sensitive data that is
stored and processed by these devices get leaked through various hardware components,
such as branch predictors, caches, Translation look-aside buffers (TLBs), page tables, prefetchers, Dynamic Random Access Memory (DRAM) controllers, DRAM, and non-volatile memories
(NVMs). Basically, these hardware components become side-channels and/or covert-channels
and become source of information leakage in the form of side-channel and covert-channel attacks (for example, the recent
meltdown and spectre attacks).
The goal of the course is to make students understand the various sources of attacks and their mitigation techniques at the memory systems,
and design secure memory systems. The course will be a fusion of fundamentals and state-of-the-art research on secure memory systems.